Integrated Circuit. Transistor Transistor Logic (TTL). 4−Line−to−16−Line Decoder /Demultiplexer. 24−Lead DIP Type Package. Description: The NTE is a. 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test . datasheet, circuit, data sheet: NSC – 4-Line to Line for Electronic Components and Semiconductors, integrated circuits, diodes, triacs.

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You can upvote datashert than one answer. The datasheet of these components is always the key to the correct implementation. By clicking “Post Your Answer”, you acknowledge that you have read our updated terms of serviceprivacy policy and cookie policyand that your continued use of the website is subject to these policies. I am a new user so I didn’t know I had that power.

My first question is more important As for the NAND gates, there is a function being implemented in which the gates are there to realize it. Many TTL parts and older memory chips have active low enable inputs, so the active low outputs of this part can be connected directly to those inputs.

Rather than providing only a single enable, both pins are used.

(PDF) 74154 Datasheet download

Will someone fatasheet explain the purpose of inverting the outputs 0 through 15 as well as the use the NAND gates here? So theory will cover only the theory which explains the basic functionality of the working of a demultiplexor.


Understand, this is a typical example of application, not it’s sole purpose. Home Questions Tags Users Unanswered. If you have some experience using BJTs you will know that NPN transistors are best used to pull a signal to 0V common emitter, with the output connected to the collector and quite weak at pulling a signal high.

4 Line to 16 Line Demultiplexer / Decoder

I understand how it works. Please consider upvoting those questions you found useful like this one by clicking the arrow pointing up near the answer vote count which is in turn above the checkbox you clicked to accept this question.

This is the image of a 1 to 16 demux.

Post Your Answer Discard By clicking “Post Your Answer”, you acknowledge that you have read our updated terms of serviceprivacy policy and cookie policyand that your continued use of the website is subject to these policies. By using our site, you acknowledge that you have read and understand our Cookie PolicyPrivacy Policyand our Terms of Service. Post as a guest Name. If you want to know exactly what is going on then draw out the truth table, but it is unlikely their function will make much sense to you.

The person who took time to answer the question will appreciate that. I have a doubt in the demultiplexer section.


Datasheet(PDF) – National Semiconductor (TI)

Inputs were pulled high by default, and only pulled low when necessary, to save power. Why is the output in the truth table inverted in a ic used as a demux? The LED can be chosen at random by the status of the 4 line selector inputs. The actual implementation of the chosen ic has active low outputs.

Post as a guest Name. Why are the outputs inverted? The active-low enable inputs allow cascading of demultiplexers over many bits.

This chip is often used in demultiplexing applications, such as digital clocks, LED matrices, and other graphical outputs.

All the other ouputs stay high.

National Semiconductor

High speed signals were usually active low, for much the same reason. For example, if the target application requires 16 7-segment LED displays, but your microcontroller only has 4 lines to select which display is active, this chip 74LS would provide a very effective method of essentially multiplying you selecting lines by a 4 times.

It is counterintuitive yes, but it is a well-established convention that the sort of devices that this part will be controlling will have active-low enable inputs. So TTL circuitry adopted asymmetric logic levels, where ‘0’ was guaranteed to be below 0.

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